As the transistor feature side continuously scales down to improve performance, modern circuitry continues to become more susceptible to radiation induced errors commonly referred to as soft errors. Soft errors can manifest, for example, due to neutron particles originating from space or alpha particles originating from packaging. A soft error occurs when an energetic particle, such as a neutron or an alpha particle, hits the diffusion region of a reverse bias transistor. This, in turn, allows an “off” transistor to temporarily conduct current which can cause a voltage change in a node connected to the affected transistor. If the error occurs in combinational logic, the resulting voltage pulse may be stored in a connected flip flop, thus causing an error. On the other hand, if the error occurs in memory or in a latch during the hold phase, the stored data may change. To mitigate these undesired soft error effects, there is a need for design methodologies that reduce the vulnerability of circuitry to radiation effects.
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